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  1. Synopsys Design Platform Certified by GLOBALFOUNDRIES for 22nm FD-SOI Process Technol
  2. Synopsys and GLOBALFOUNDRIES Collaborate to Develop DesignWare IP for 22FDX® Process
  3. Synopsys' New ARC Secure IP Subsystem Addresses Security Threats in Embedded SIM and
  4. Synopsys' New ARC Secure IP Subsystem Addresses Security Threats in Embedded SIM and
  5. Cadence Reference Flow with Digital and Signoff Tools Certified on Samsung's 10nm Pro
  6. Synopsys' Galaxy Design Platform Enables Superior Low-Power Designs on Samsung's 10-n
  7. Synopsys Custom Compiler Certified for Samsung's 10-nm Process Technology
  8. Faraday Reduces Packaging Design Time by 60 Percent Using Cadence OrbitIO Interconne
  9. Synopsys Delivers Next-Generation Verification IP for Micron's Hybrid Memory Cube Arc
  10. ARM and UMC will develop multiple physical IP platforms, deal will see 10 billion pie
  11. Synopsys Delivers Industry's First Verification IP for USB Power Delivery 3.0
  12. Cadence and University of Oxford Foster the Advancement of Formal Verification Innova
  13. Synopsys Extends Verification IP Portfolio for Automotive Applications
  14. Samsung Starts Mass Producing Industry’s First 10-Nanometer Class DRAM
  15. Mentor Graphics New HyperLynx Release Integrates Signal and Power Integrity, 3D-Elect
  16. The 53rd Design Automation Conference Announces Keynotes, SKY Talks and Visionary Tal
  17. EDA Consortium Becomes Electronic System Design Alliance
  18. Intel Custom Foundry Certifies Synopsys Implementation and Signoff Tools for 10-nm Tr
  19. Synopsys' Custom Compiler Deployed at STMicroelectronics to Boost IP Development Prod
  20. Arteris FlexNoC Interconnect IP is Licensed by Movidius for Ultra-Low...
  21. Toshiba Announces Immediate IP Subsystem Availability of 10 Gigabit Ethernet for Cust
  22. Mentor Graphics Optimizes Tools and Flows to Help Designers Succeed With Samsung Foun
  23. Silicon Creations Adopts ProPlus Design Solutions' NanoSpice to Simulate SerDes IP
  24. Sidense Exhibiting at TSMC 2016 North American Technology Symposiums
  25. Synopsys Enhances Luminaire Design with LightTools 8.4 Release
  26. Synopsys Enhances Luminaire Design with LightTools 8.4 Release
  27. Mentor Graphics Signs Multi-year Agreement with ARM for Early Access to ARM IP to Acc
  28. Cadence Innovus Implementation System Qualified on Samsung 10nm FinFET Process
  29. SMIC 28nm HKMG Process Ready to Launch Smartphone SoC with Leadcore
  30. Mentor Graphics Announces Open Manufacturing Language, an Open Internet of Manufactur
  31. Mentor Graphics Announces Open Manufacturing Language, an Open Internet of Manufactur
  32. Macnica Demonstrates Video Transport Over IP Interoperability at VidTrans16
  33. SMIC 28nm HKMG Process Ready to Launch Smartphone SoC with Leadcore
  34. Synopsys' IC Validator Certified by Samsung Foundry 14-nm Process for Signoff Physica
  35. Synopsys' IC Validator Certified by Samsung Foundry 14-nm Process for Signoff Physica
  36. "Software and Memory Footprint Challenge Traditional EDA"
  37. Hardware Models For Software: with Brian Bailey
  38. Mentor Graphics Expands Embedded Software Development Capabilities for Secure Industr
  39. Technavio Announces Top Five Emerging Trends Impacting the Global Wafer Fab Equipment
  40. Mentor Graphics Expands Embedded Software Development Capabilities for Secure Industr
  41. Cadence to Showcase Tensilica DSPs and Design IP at Mobile World Congres
  42. Speeding-up Fast Fourier Transform Mixed-Radix on Mobile ARM Mali GPU by means of Ope
  43. ARM releases 28nm optimization package; New custom lighting keyboard; Renesas eyes au
  44. performance - A15 single core vs. A15 dual core
  45. Renesas Electronics Develops 90 nm One-Transistor MONOS Flash Memory Technology to Ac
  46. OneSpin Solutions to Exhibit Range of Formal Verification-Base
  47. Synopsys Redefines Circuit Simulation with Native Environment
  48. United States And China Patent And Trademark Offices Issue New LRDIMM And Hybrid Memo
  49. Xilinx Announces Data Center Ecosystem Investment Program to Broaden Cloud Computing
  50. Intopix Announces Availability Of TICO IP-Cores Supporting UHDTV1 And 4K Up To 60 Fps
  51. ISF EDA : Cypress Supports Wafer Sales on Leading F-RAM and nvSRAM Portfolio
  52. Synopsys' IC Compiler II Qualified for Samsung Foundry 10-nanometer Process
  53. Synopsys Delivers Industry's First Ethernet 400G Verification IP for Next-Generation
  54. Mentor Graphics Veloce Emulation Platform Supports Andes Processors
  55. Designing IoT Applications? Cadence and ARM Now Offer an IP Reference System
  56. Cadence Now Offers Verification IP for ARM AMBA 5 AHB5
  57. New Synopsys Verification IP for AMBA 5 AHB5 + System-level Extensions
  58. Morpho's MovieSolid and Morpho Video WDR Now Available on Cadence Tensilica Imaging/V
  59. Synopsys Extends Software Integrity Platform with Acquisition of Open Source Software
  60. GLOBALFOUNDRIES Achieves 14nm FinFET Technology Success for...
  61. Arteris Licenses FlexNoC Interconnect IP to Beijing Pinecone for...
  62. SoC Performance, Performance, Performance ..
  63. ARM Ecosystem Showcases Foundation for the Connected World at ARM TechCon 2015
  64. System on Chip, or System on Chips: The Many Paths to Integration
  65. Cadence Senior Vice President and Chief Financial Officer Geoff Ribar to Present at t
  66. Modified harvard architecture
  67. Vivante to Highlight Cutting-Edge GraphiVisor™ Virtualization Technology at Virtualiz
  68. Semtech Displays UHDTV Hybrid SDI/IP Interoperability of Its 12Gb/s UHD-SDI Portfolio
  69. Socionext Licenses and Deploys CEVA Imaging and Vision DSP for Milbeaut™ Image Proces
  70. Toshiba and SanDisk Announce Start of Equipment Installation at Yokkaichi’s New Fab 2
  71. Andes Technology and INVECAS Enter Into a High Value Collaboration to Win Designs for
  72. 50+ Successful DO-254 Projects Supported by Aldec’s FPGA Test System; Now with Pre-To
  73. Free access to ARM IP with DesignStart; New Freescale multi-mode MCU; World's 1st mod
  74. Ultratech Receives Large Multiple System Order For Fan-Out Wafer-Level Packaging Appl
  75. Cadence Named One of World's 25 Best Workplaces
  76. Andes Technology Corporation Launches New DSP+CPU Core Offering 134 Percent Higher Pe
  77. ARM University Program Professor Workshop on Advanced System-on-Chip (SoC) Design usi
  78. MagnaChip to Host Foundry Technology Symposium in Shenzhen, China
  79. GaAs RF Device Revenue Reaches Record Levels in 2014
  80. Vivante Vision Image Processor to Power Mass Market Surveillance Camera and Automotiv
  81. ARM - Nordic Workshop on Internet of Things and Embedded System Design
  82. Synopsys Unveils New ATPG Technology Delivering 10X Faster Test Pattern Generation
  83. ISF -EDA Consortium Executive Director to Be Keynote Speaker at Si2
  84. Vivante Announces Expansion of Automotive Market Embedded GPU Leadership
  85. Synopsys Unveils New ATPG Technology Delivering 10X Faster Test Pattern Generation
  86. Synopsys Test Solution Certified for the Most Stringent Level of Automotive Safety Me
  87. Open-Silicon Announces Comprehensive High Bandwidth Memory (HBM) Gen2 IP Subsystem So
  88. ISF -EDA -IP :Synopsys Announces Security IP Solutions for New SHA-3 Cryptographic
  89. STMicroelectronics Adopts ARM?s Latest Processor Technology for Automotive Applicatio
  90. ISF-EDA :Freescale's FNET and ARM mbed OS
  91. ISF EDA :TSMC Recognizes Synopsys with Partner Awards for Interface IP
  92. ISF EDA :Cadence Receives 2 TSMC Partner of the Year Awards for 10nm FinFET Solutions
  93. TSMC Recognizes Synopsys with Partner Awards for Interface IP and Joint Development o
  94. ARM Joins Semiconductor Research Corporation
  95. Synopsys Accelerates Development of IoT Designs with Industry's Most Comprehensive IP
  96. ARM Cortex A53 Octa Core 64-bit Application Processor S5P6818 Released
  97. ANSYS Certified For The Latest Generation Chip Technology
  98. Analog Bits to Present Half-power, Multi-protocol SERDES at TSMC Open In
  99. TSMC Certifies Synopsys' IC Compiler II on 10-nanometer FinFET Process
  100. Mentor Graphics Certified for TSMC 10nm FinFET Process Technology
  101. Mobiveil Inc. to Exhibit at the TSMC 2015 Open Innovation Platform Ecosy
  102. TI and UC Berkeley encourage creativity through bringing art to engineering
  103. TSMC Certifies Silvaco's InVar(TM) Gate Level EM/IR Analysis Solution for 16nm FinFET
  104. Radisys and EZchip Announce Partnership to Solve Mobile Operators’ Service Scalabilit
  105. Multicore and IoT Development tools for host and target
  106. 53rd Design Automation Conference (DAC) Names Executive Committee
  107. Cadence to Showcase Latest PCB Design Tools at PCB West 2015
  108. Synopsys, Customers and Partners Present the Latest Technologies and Tre
  109. Synopsys, Customers and Partners Present the Latest Technologies and Tre
  110. Sidense Exhibiting and Presenting at TSMC Open Innovation Platform (OIP) Ecosystem Fo
  111. GLOBALFOUNDRIES and Catena Partner to Provide Next-Generation RF...
  112. Silvaco and Singapore University of Technology and Design Launch RF IC Design Collabo
  113. Synopsys' IC Validator Distributed Processing Accelerates Signoff Physical Verificati
  114. Symmetry Electronics and Lattice Semiconductor Announce Signing of Distribution Agree
  115. Kilopass to Demonstrate Embedded Non-Volatile Memory IP at IIC-China 201
  116. Cadence Successfully Concludes its Flagship User Conference CDNLive India 2015
  117. IDT Presents TSMC with Strategic Partnership Award
  118. Looking for a SoC development board
  119. CEVA Announces the Certification of RivieraWaves Bluetooth Smart 4.2 Platform IP
  120. ARM Approved Training Course: ARM Cortex-A/R
  121. Avnet Gives the 411 on IoT in Latest AXIOM Magazine in the Americas
  122. eASIC and Tamba Networks Announce Immediate Availability of 100 Gigabit Ethernet Solu
  123. Bye Bye Soon, ARM Dev Platforms, ARM Processors Udemy Course
  124. Keil uVision4 implement the software on ARM Cortex M3 LPC1768 "No ULINK Device found"
  125. Kilopass to Showcase Its Embedded Non-Volatile Memory IP at Flash Memory
  126. ISF EDA -Cadence Joules RTL Power Solution Delivers 20X Faster Time-Based Analysis
  127. ISF -EDA -Cadence to Showcase IP and Processor Technology at 2015 Flash Memory Sum
  128. New Cadence Joules RTL Power Solution Delivers 20X Faster Time-Based Power Analysis w
  129. Synopsys and ASMedia Announce Industry's First USB 3.1 Interoperability Demonstration
  130. Toshiba Licenses ARM Cortex-A53 High-performance Microprocessor
  131. Synopsys Achieves Certification from Multiple Standards Organizations for Portfolio o
  132. ARM® IoT Subsystem for Cortex®-M Processors - IoT applications
  133. Synopsys Achieves Certification from Multiple Standards Organizations for Portfolio o
  134. eSilicon Selects ProPlus Design Solutions' High-Performance Parallel SPICE Simulator
  135. Synopsys' LightTools Delivers Innovative Modeling Capabilities for Freeform Optics in
  136. Synopsys' LightTools Delivers Innovative Modeling Capabilities for Freeform Optics in
  137. Peregrine Semiconductor Promotes Alain Duvallet to VP of RF Process Technology
  138. ISF EDA:MagnaChip Develop 0.18 micron Automotive Process Technology with ABOV, UNIST
  139. The FinFET Revolution is Changing Computer Architecture
  140. Rockchip Reaches Strategic Cooperation with Indonesian Manufacturing Giant ADVAN
  141. Teledyne DALSA Completes Large Format CMOS X-Ray Detector Series for Non-Destructive
  142. Cadence and Applied Materials Collaborate on Joint Development Program to Optimize Pl
  143. Cadence and Applied Materials Collaborate on Joint Development Program to Optimize Pl
  144. Synopsys Collaborates with NTU, NCKU, NTHU, and NCTU to Establish Joint Design Labs f
  145. Synopsys Collaborates with NTU, NCKU, NTHU, and NCTU to Establish Joint Design Labs f
  146. Synopsys PCI Express IP Adds System-Level Data Protection Features for High-Performan
  147. ISF -EDA -Synopsys and UMC Expand 14-nm FinFET Collaboration
  148. ISF -EDA -UMC Collaborates with ARM to Validate UMC 14nm FinFET Process
  149. ISF -EDA -UMC Collaborates with ARM to Validate UMC 14nm FinFET Process
  150. Synopsys and UMC Expand 14-nm FinFET Collaboration to Include DesignWare Embedded Mem
  151. ISF -EDA :Cadence to Showcase Comprehensive PCI Express IP and Verification
  152. ISF- EDA-Cadence to Showcase Comprehensive PCI Express IP and Verification Soluti
  153. ISF-EDA :Cadence to Showcase Comprehensive PCI Express IP and Verification Soluti
  154. ISF -EDA Synopsys RSoft 2015.06 Release Streamlines Design of Photonic Devices
  155. Synopsys' IC Compiler II Accelerates Silicon Validation of Imagination's Ground-break
  156. Synopsys Continues Innovation Momentum with Latest IC Compiler II Release
  157. QuickLogic to Exhibit at Sensors Expo & Conference in Long Beach, CA
  158. Synopsys Accelerates Automotive SoC Development with Broad Portfolio of Silicon-Prove
  159. Cadence Announces Next-Generation JasperGold Formal Verification Platform
  160. Mixel Achieves First-Time Silicon Success with MIPI D-PHY RX+ Configuration
  161. Perforce and Methodics Integrate Solutions to Deliver Highly Scalable IP Lifecycle Ma
  162. Visit Mobiveil Inc. at the Linley Carrier Conference 2015; Learn the Lat
  163. eInfochips Chief Technologist to Outline Trends and Challenges for VLSI Engineering a
  164. Mentor Graphics Enterprise Verification Platform Delivers New Levels of Performance a
  165. A busy week for ARM: IP Tooling, ARM/Samsung media processing agreement, IoT subsyste
  166. PLDA and ARM to deliver PCI Express-enabled ARM Juno development platform
  167. Intel Custom Foundry Certifies Synopsys Implementation Tools for 14-nm FinFET Product
  168. Intel Custom Foundry Expands Offering with Reliability Checking Using Calibre PERC
  169. Cadence Implementation and Signoff Tools Certified on Intel Custom Foundry 14nm
  170. ISF-EDA Sankalp Semi Announces FD-SOI Services and IP Partnership With STMicro
  171. ISF-EDA -Samsung Announces MP of Industry’s First 14nm FinFET Mobile Application
  172. ARM and Samsung Sign Long-Term Agreement to Take Customers’ Visual Experiences
  173. Sibridge Technologies Adopts Atrenta IP Kit
  174. New ARM IP Tooling Suite Reduces SoC Integration Time from Months to Days
  175. eSilicon Adds SMIC as a Foundry Choice for Online GDSII Quoting
  176. ISF-EDA -Carbon Design Systems to Demonstrate System-Level Virtual Pro
  177. ISF-EDA -GLOBALFOUNDRIES Solidifies 14nm FinFET Design Infrastructure
  178. ISF EDA SMIC Adds Reliability Checks to IP Certification Program Based on Mentor
  179. ISF EDA -Synopsys' IC Compiler II Used to Tape Out 28-nm-FD-SOI SoC
  180. ISF EDA -MagnaChip to Offer 0.18 micron 100V High Voltage BCD Process
  181. Real Intent Sets the Pace at DAC 2015 for Fun, Faster Verification and Design Success
  182. Fonon Corporation’s 3D FUSION™ Technology Eliminates Continuous Fluctuations in Laser
  183. Efficient Power Conversion (EPC) Widens the Performance Gap with 7 m
  184. MEDIA ALERT: Silvaco Celebrates 30 Years as a Leader in EDA Industry at 52nd DAC
  185. MEDIA ALERT: Carbon Design Systems to Demonstrate System-Level Virtual Prototypes in
  186. Kilopass Heads to Israel, Japan, Taiwan, The Netherlands
  187. From months to days: an IP integration innovation at 52DAC
  188. UMC Unveils UMC Auto(SM) Platform to Enable Automotive IC Designs
  189. Arteris FlexNoC Fabric IP Implemented in New Toshiba 4K Ultra HD...
  190. Synopsys CFO Trac Pham to Speak at D.A. Davidson Technology Forum
  191. Altera Speeds IEC 61508-compliant Designs with Certified 28 nm FPGAs, SoCs, and Toolf
  192. ARM and UMC Target New 55nm ULP Physical IP Solution for Energy-Efficient Application
  193. ISF-EDA Synopsys and Broadcom Expand Collab , to Deploy ARC Processors in Multimedia
  194. Xilinx Achieves 28nm Milestone with Over $1B in Cumulative Revenues and 65 Percent Ma
  195. ISF-EDA -Credo First to Demonstrate 28G SerDes on 16FinFET Plus Technology
  196. ISF-EDA Synopsys' Modeling of 10-nanometer Parasitic Variation Effects
  197. ISF-EDA -SOC Future of SoC Designs: Network-on-chip - Aims Technology.pdf
  198. ISF -EDA -IP Agave Semi Receives Motor Control Patent
  199. ISF-EDA-IP Chipworks Patent Analytics Soln Combines Text Analytics Data on 60,000+ P
  200. ISF-EDA - Kilopass Named Platinum Sponsor of the GSA Silicon Summit on F
  201. ISF EDA - Ultratech Shipping Superfast 4G To Major Memory Manufacturer In Asia
  202. ISF -EDA -EDA Consortium Reports Record Revenue For Q4 2014
  203. ISF -EDA Advantech Joins Sony IP Live Production System Alliance
  204. ISF -EDA -When Your Embedded Processor Runs Out of Steam, Try Parallelism
  205. ISF EDA -SOC Arteris Delivers FlexNoC Version 3 to Enhance System-on-Chip (SoC) IP...
  206. Tektronix and Cadence team up to enable 200Gb/sec data transfer speeds using DDR4 & L
  207. Altera and TSMC Innovate Industry-first, UBM-free WLCSP Packaging Technology Platform
  208. Synopsys Announces Immediate Availability of Broad Portfolio of Silicon-Proven IP for
  209. Embedded Beat: BBC’s Make It Digital—One million free "Micro Bit" programmable device
  210. : Kilopass to Demonstrate Antifuse NVM IP at TSMC 2015 Technolog
  211. Cadence Digital and Custom/Analog Tools Achieve TSMC Certification for 10nm FinFET Ea
  212. TSMC Certifies Synopsys Design Tools for 16-nm FinFET Plus Production and for 10-nm E
  213. Visit Andes Technology at the TSMC NA Technology Symposium; Learn How An
  214. As Semicon Fabs Eye Solutions for Moore's Law Extension, Pibond Introduces a New Prod
  215. Semtech Announces IP Collaboration with MorethanIP to Support Ethernet at Speeds of 2
  216. Sidense Exhibiting at TSMC 2015 North American Technology Symposiums
  217. Mobiveil's Smallest Footprint Low-Density Parity Check LDPC-Based Flash Reliability I
  218. Sidense Increases Its Coverage of the Popular 28nm Node
  219. Toshiba Develops World's First 48-Layer BiCS (Three Dimensional Stacked Structure Fla
  220. New Synopsys ASIP Designer Tool Speeds Development of Application-Specific Instructio
  221. Cadence to Demonstrate 16FF+ and 10nm Design Solutions at TSMC Technolog
  222. Rambus Licenses Patents and Technology Solutions to IBM
  223. Cadence and ARM Announce Strategic IP Interoperability Agreement
  224. Synopsys Enables Continuous Debug Innovation with More Than 200 VC Apps Now Available
  225. Cadence's New Digital Implementation System: An Inside Look
  226. Argon Streams VP9 Supports New High-Bit Depth Profiles
  227. Wafer-Level Packaging (WLP) Equipment Manufacturer, Yield Engineering...
  228. Mentor Graphics Wins Injunction In Patent Suit With Synopsys
  229. ARM and the BBC collaborate on a new initiative
  230. Synopsys Continues to Sell, Ship and Support ZeBu Emulation Systems Worldwide
  231. Synopsys' New Verification IP for MIPI SoundWire Enables Audio and Control Interfaces
  232. UMC Broadens its 55nm eFlash Platform with Faraday's Silicon-proven IP
  233. Nufront Selects Uniquify DDR Subsystem IP to Support Advanced 28nm SoC Project
  234. Synopsys Galaxy Design Platform Enables 90 Percent of Volume-Production FinFET Design
  235. Synopsys Galaxy Design Platform Deployed by HiSilicon Technologies for Implementation
  236. QuickLogic CTO to Participate on the IoT Panel at MEMS Executive Congres
  237. ARM Collaboration with Popular Game Engine Providers
  238. Synopsys Announces VDK for Freescale S32V200 MCU Family for Advanced Driver Assistanc
  239. Cadence Named to FORTUNE'S 2015 List of "100 Best Companies to Work For"
  240. Winter 2015 Issue of Xcell Journal Examines Xilinx's New 16nm UltraScale+ Portfolio
  241. Rockchip and Intel released SoFIA program at 2015MWC
  242. Global Unichip Corporation Utilizes Cadence Analog IP to Implement WiGig-Enabled SoC
  243. Tehuti Introduces Industry’s First NBASE-TTM Adapter Reference Design for Enterprise
  244. Plunify to Host "Got FPGA Timing Closure Problems?" Webinar March 10
  245. Waves MaxxVoice Technology Now Available for Cadence Tensilica HiFi Audio DSPs
  246. Breker Verification Systems to Exhibit Cache Coherency TrekApp Verificat
  247. SMIC Achieves 8M Pixel CIS Production on 0.13-Micron BSI with Cista
  248. Renesas Electronics Develops 28nm Embedded Flash Memory Technology
  249. Hitachi Reduces Verification Turnaround Time for Mixed-Signal Chip with Cadence Virtu
  250. Cadence Achieves First PCI Express 2.0 and PCI Express 3.0 Compliance for TSMC 16nm